Systems-on-Chip (SoCs) and Systems-in-Package (SiPs) typically comprise a plurality of circuits that communicate with one another via a shared communication channel. For instance, said communication channel can be a communication bus or communication network, such as, for instance, a Network-On-Chip (NoC) or Network-in-Package (NiP).
FIG. 1 shows a typical architecture of a said communication system.
In the example considered, data can be exchanged between an initiator or communication source 1 and a destination of the communication or target 6, and the data generated via the initiator 1 are transmitted to the target 6 through a data-link layer DL that comprises a communication channel 4.
Both the initiator and the target of the communication can comprise a single circuit or a plurality of sub-circuits. For instance, the initiator 1 can comprise a node of an NoC 12, an image-processing or video-processing circuit 14, and a generic processor 14. Instead, the target 6 can comprise, for instance, a node of a NoC 62 or various memories 64 and 66, such as, for instance, memories of the Double-Data-Rate (DDR) Random-Access Memory (RAM) type. Said memories 54 and 56 can also have different access rates.
In the case where a plurality of circuits have access to one and the same data-link layer DL, there can also be provided routing modules 18 and 68. For instance, in the example considered, each circuit 12, 14 and 16 segments the data to be sent to a target into different packets, which are sent to a module 18 that controls access to the data-link layer DL, i.e., to the shared communication channel 4. For instance, the module 18 can for said purpose implement also a scheduling algorithm, such as, for instance, a scheduling of the round-robin type. The module 18 can also implement other functions, for instance a control of the quality of service (QoS).
Next, the data are transmitted over the communication channel 4. Said operation can include a flow control and/or encoding operations, for instance, to reduce the activity of switching on the physical lines and to serialize or de-serialize the data.
The reception side is substantially complementary to the transmission side. In particular, also in this case a module 68 can be provided, which collaborates with the module 18 and transmits the data received via the channel 4 to the respective target circuit.
Moreover known are communication systems that comprise a plurality of communication channels to enable different QoS classes.
For instance, FIG. 2 shows an embodiment that comprises two communication channels 4a and 4b for transmitting low-priority traffic and high-priority traffic, respectively.
In this case, it is usually specified whether a data packet must be transmitted on the first communication channel or on the second communication channel. For instance, in the example considered, the initiator 12 can be a module that is assigned exclusively to the low-priority communication channel 4a, whereas the initiator 14 can be a module that is assigned exclusively to the high-priority communication channel 4b. Instead, the module 16 could be a module that can determine for each packet the respective transmission priority. In this case, the module 18 is configured for detecting the priority of the data and transmitting the data on the respective communication channel.
In a substantially similar way, also the targets can be assigned exclusively to any one of the communication channels or can also support a number of communication channels.
For instance, FIG. 3 shows a possible embodiment of the data-link layer DL currently used in the STNoC (ST Network-on-Chip) communication system.
In the example considered, the data-link layer DL receives data TX_Data from the initiator 1 and transmits said data through one of the two communication channels 4a or 4b. The data received RX_DATA are next transmitted to the target 6. In particular, in the example considered, the data are transmitted to the data-link layer DL by entities called “flits” (flow control units).
For instance, to transmit a flit on the first communication channel 4a, a first control signal TX_REQ1 is used to request transmission of low-priority data, i.e., to signal that low-priority data are available at the input TX_DATA, and a second control signal TX_ACK1 is used for signalling to the initiator 1 that the layer DL has received said data. In a substantially similar way, to transmit a flit on the second communication channel 4b, a control signal TX_REQ2 can be used for signalling that high-priority data are available at the input TX_DATA, and a second control signal can be used TX_ACK2 for signalling that the layer DL has received said data.
For instance, in the embodiment considered, a flit is addressed via a de-multiplexer 80 to the channel 4a or to the channel 4b according to the values of the signals TX_REQ1 and TX_REQ2. In a way substantially similar, a multiplexer 82 can be provided on the reception side, which supplies at output the flits received via the channels 4a or 4b. 
The person skilled in the art will appreciate that there can also be provided other blocks for managing the physical communication on the communication channels 4a and 4b, such as, for instance, blocks 3a and 3b for transmitting the flits on the respective communication channel 4a and 4b, and blocks 5a and 5b for receiving the flits transmitted on the channels 4a and 4b, i.e., said blocks can implement the flow-control operations and/or encoding and decoding operations mentioned above. In fact, the blocks 3a and 3b can also manage directly on the transmission side the control signals TX_REQ1, TX_REQ2, TX_ACK1 and TX_ACK2, and the blocks 5a and 5b can manage similar signals RX_REQ1, RX_REQ2, RX_ACK1 and RX_ACK2 on the reception side for signalling that low-priority data or high-priority data are available (signals RX_REQ1, RX_REQ2) and to verify that reading of the data by the target 6 (signals RX_ACK1 and RX_ACK2) is through.
Furthermore, it is not necessary for the communication channels to be created via simple interconnection wires, but they can also comprise active components, such as, for instance, buffers.
FIG. 4 shows in this context a possible embodiment of the entire communication system currently used in the STNoC communication system.
In the example considered, a generic circuit A generates data to be transmitted to a generic circuit B. For instance, the circuit A can be a routing node that receives data from a plurality of circuits. In particular, the routing node can comprise an arbiter or scheduler that determines which packets are addressed to the data-link layer DL.
For instance, in the STNoC communication system, the sequence of the packets at output is saved in an output buffer 20. In particular, in the example considered, the low-priority packets are addressed via a de-multiplexer 202 to a first buffer 204a, such as, for instance, a first-in first-out (FIFO) memory, and the high-priority packets are addressed to a second buffer 204b. 
The packets saved in the buffers 204a and 204b are next sent via a multiplexer 206 to the data-link layer DL, described previously with reference to FIG. 3, and transmitted via the layer DL to the target 6. In particular, for saving the packets received via the communication channels 4a and 4b, the target 6 can comprise an input buffer 70. In a substantially similar way, also in this case the packets can be separated via a de-multiplexer 702 into low-priority packets that are saved in a first buffer 704a, such as, for instance, a FIFO memory, and high-priority packets that can be saved in a second buffer 704b. Consequently, the buffers 704a and 704b supply at output the low-priority packets and high-priority packets, respectively, to the circuit B.
Consequently, all the logic necessary for a transmission channel is substantially duplicated, which introduces a considerable complexity and a high cost. In fact, said duplication is necessary to prevent a transmission block on the low-priority transmission channel, for instance on account of a possible filling of the buffer 704a, from possibly affecting transmission of the high-priority packets.